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CAST provides semiconductor IP Cores and IP Platforms for System on Chip (SoC) designs in ASICs and FPGAs. This IP facilitates SOC realization, the integration of ...

JHDL is a method of describing (programmatically, in JAVA) the components and connections in a digital logic circuit.

Python package for using Python as a hardware description and verification language.

Offers Xilinx FPGA demo boards for rapid VHDL core developments and tests.

Collection of Electronic Design Automation (EDA) and Computer-Aided Design(CAD) activities for the purpose of support, open exchange and dissemination of ...

organization dedicated to cooperatively and proactively promoting the Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) as a standard ...

VHDL, Verilog, SystemVerilog, SystemC, ARM, Embedded, Xilinx, Altera, Perl, Tcl/Tk, training and consultancy.

Specialized in electrical engineering and physics. Presents sections about events, education, and publications.